Design Verification Lead, AI Hardware
About the positionResponsibilities• Lead and mentor the verification team, defining strategies that address both AI compute challenges and data-flow requirements. • Develop and implement verification plans for AI cores and on-chip networks, incorporating multi-core synchronization, concurrency controls, and robust error-injection mechanisms to ensure system resilience. • Collaborate closely with architecture, design, and software teams to align verification efforts with system-level requirements and evolving AI workloads.• Architect and oversee the implementation of testbenches, test cases, and coverage models (functional, code, assertion-based), driving coverage closure for AI computations, transformations, and mixed-precision data types (BF16, FP8, INT8, etc.). • Validate throughput/bandwidth of various AI workloads, debugging bottlenecks to ensure performance and accuracy objectives are met. • Verify NoC functionality under high-demand traffic, including congestion testing and performance benchmarking, while ensuring functionally correct handling of distributed data-movement strategies.• Develop platform agnostic test strategies to enable reuse across subsystems, FPGA, SoC, and silicon. • Analyze test results, track coverage metrics, debug failures, and ensure adherence to performance benchmarks and bandwidth targets. • Review and approve verification deliverables, ensuring comprehensive coverage, sign-off criteria, and compliance with project timelines and tape-out requirements. • Adopt emerging AI/ML verification techniques, integrating advanced tools, automation frameworks, and industry best practices.Requirements• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. • 10+ years of ASIC/SoC verification experience, with at least 3+ years in a leadership role. • Proven track record in verifying complex AI/ML hardware architectures or high-performance compute cores. • Deep expertise in AI-specific data types, tensor operations, and memory access patterns (e.g., BF16, FP8, INT8). • Hands-on experience with NoC verification, including congestion testing, bandwidth analysis, and performance benchmarking.• Proficiency in UVM, SystemVerilog, cocotb, and industry-standard verification tools; C/C++ proficiency beneficial. • Experience with emulation platforms, performance models, and coverage-driven verification methodologies. • Strong communication and leadership skills, with a history of cross-functional collaboration and guiding teams to successful tape-outs. Benefits• Highly competitive compensation package• Equal opportunity employer Apply tot his job