Note: The job is a remote job and is open to candidates in USA. Raytheon Australia is a leading aerospace and defense company seeking a Principal Electrical Engineer FPGA/ASIC. The role involves designing, implementing, verifying, and integrating high-performance ASICs and FPGAs for Collins Avionics solutions.
Responsibilities
- Requirements capture, decomposition, and traceability
- FPGA/ ASIC/SoPC digital architecture development and design
- Develop RTL design code and simulation in VHDL, Verilog, and/or SystemVerilog
- Create UVM constrained random environments using SystemVerilog
- Create placement and timing constraints
- Perform synthesis, place and route
- Perform static timing analysis, linting analysis, LEC, and clock-domain-crossing analysis
- Perform FPGA/ ASIC/SoPC verification using inspection, analysis, simulation, and test methods
- Creation of DO-254 DAL-A certification artifacts for Airborne Electronic Hardware (AEH)
- Conduct and/or participate in peer reviews throughout product lifecycle
- Participate in FAA SOI audits
- Create engineering bids and support RFIs and RFPs
- Communicate well with a wide variety of individuals including Engineering, Program Management, internal leadership and customers
- May lead a team of engineers and/or perform the duties of a project engineer
- Recommend new tools and practices for continuous improvement in the group’s FPGA/ ASIC design flow
- Provide guidance or mentor other engineers with a variety of skills and backgrounds
Skills
- Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and minimum 8 years prior relevant experience or an Advanced Degree in a related field
- Proficient writing RTL and/or testbenches using VHDL, Verilog, or SystemVerilog
- Proficient with Linux (or Unix), scripting, C/C++, Python, and/or Perl
- Proficient using FPGA specific tools (e.g. Questasim, Vivado, Libero, Synplify Pro, etc.)
- Experience with data interfaces (PCIe, DDR, I2C, Ethernet, CDN, ARINC-429, etc.)
- Experience with device level timing and clock domain crossing
- Ability to work with minimal supervision, as part of a team of engineers with a variety of skills and backgrounds, located throughout the world and matrixed into projects with aggressive schedules and frequent milestones
- Experience with UVM Constrained Random Methodology
- Proficient with DO-254 design assurance activities for ASIC, FPGA, and/or SoPC developments
- Experience with video and/or networking concepts and architectures
- Proficient with best practice chip-level verification techniques and languages (e.g. constrained random, functional coverage, code coverage, LEC, SystemVerilog)
- Experience successfully managing cost, schedule, and performance objectives
- Experience with risk management (identify, quantify, and mitigate risks)
Benefits
- Medical, dental, and vision insurance
- Three weeks of vacation for newly hired employees
- Generous 401(k) plan that includes employer matching funds and separate employer retirement contribution, including a Lifetime Income Strategy option
- Tuition reimbursement program
- Student Loan Repayment Program
- Life insurance and disability coverage
- Optional coverages you can buy pet insurance, home and auto insurance, additional life and accident insurance, critical illness insurance, group legal, ID theft protection
- Birth, adoption, parental leave benefits
- Ovia Health, fertility, and family planning
- Adoption Assistance
- Autism Benefit
- Employee Assistance Plan, including up to 10 free counseling sessions
- Healthy You Incentives, wellness rewards program
- Doctor on Demand, virtual doctor visits
- Bright Horizons, child and elder care services
- Teladoc Medical Experts, second opinion program
- Medical, dental, vision, life insurance, short-term disability, long-term disability, 401(k) match, flexible spending accounts, flexible work schedules, employee assistance program, Employee Scholar Program, parental leave, paid time off, and holidays
- Annual short-term and/or long-term incentive compensation programs depending on the level of the position and whether or not it is covered by a collective-bargaining agreement
Company Overview